SK Hynix Says It Will Set HBF Standard in January to Break AI Memory Bottlenecks

Ahn Says HBF Can Deliver More Than 10 Times HBM Capacity

“High-bandwidth flash, or HBF, offers about half the bandwidth of existing high-bandwidth memory, or HBM, but can increase capacity by more than tenfold.”

“With surging demand for artificial intelligence inference, we will overcome the memory data-transfer bottleneck.”

Ahn Hyun, SK Hynix’s chief development officer, presented HBF and 3D stacked DRAM as next-generation AI memory solutions that can overcome HBM’s limitations during a keynote speech at Semiconductor Exhibition 2026, or SEDEX 2026, held at Coex in Seoul on Oct. 14.

“If AI infrastructure performance is indexed to 1 in 2026, it will expand 20-fold by 2030,” Ahn said. With inference-service requests rising sevenfold each year, memory must move beyond being a standalone component and create a new layer to resolve the bottleneck, he added.

HBF is a next-generation memory technology that stacks NAND flash vertically instead of DRAM and links the layers with through-silicon vias, or TSVs. NAND has slower response speeds than DRAM and limitations on write endurance, but in AI inference, data reads outnumber writes by hundreds of thousands of times.

SK Hynix said it addressed NAND’s speed limitations by applying prefetch technology that retrieves data in advance. The company plans to finalize the technical standard in January 2027 and build an ecosystem around it.

Another key technology highlighted by SK Hynix was 3D stacked DRAM, which places DRAM directly on top of graphics processing units, or GPUs, and neural processing units, or NPUs. That cuts the distance data must travel compared with existing HBM.

Separately, Chinese memory maker ChangXin Memory Technologies, or CXMT, has signaled it will adopt 4F², a next-generation DRAM technology for servers. Samsung Electronics also said it is developing the technology. Asked about progress on Oct. 14, Song Jae-hyuk, Samsung’s chief technology officer and president, said, “We’re working hard on it.”

4F² is a unit describing the area occupied by a single DRAM cell. Compared with the existing 6F² structure, the next-generation technology can reduce cell area by about one-third.

Roh Yoo-jung and Won Jong-hwan, Hankyung.com reporters yjroh@hankyung.com